1. Field of the Invention
The present invention is in the field of nonlinear devices, and more specifically, is in the field of reducing distortion produced by nonlinear devices.
2. Discussion of the Prior Art
In the prior art, digital modulation schemes are widely employed in various multi-carrier communication systems (for instance, in wireless communication systems, in satellite communication systems, etc.) to achieve multiple objectives, like capacity improvement, better transmitted quality of data, and higher data rate transmission. In non-constant envelope digital modulation schemes, the information is included in both amplitude and phase of the modulated signals.
In the prior art, a linear amplifier is a preferable device to amplify such signals, because, in theory, an ideal linear amplifier does not cause signal distortions. On the other hand, a non-linear amplifier causes degradation of signal quality due to amplitude and phase distortions caused by nonlinear devices. In addition, linear amplifiers are also beneficial in amplifying multi-carrier signals simultaneously, in applications such as cellular base stations, without creating significant distortions.
One more advantage of employing linear amplifiers is that it reduces the number of amplifiers used, as well as eliminates high power combiner chains. Thus, usage of linear amplifiers directly results in reducing size, complexity and cost of the overall amplification systems which is highly important in applications such as satellite systems and cellular base stations.
The DC power consumption for linear amplifiers should also be minimized in order to attain high efficiency, higher performance reliability and reduction of operating costs. Such features of linear amplifiers are highly desirable in all communication systems.
In order to meet the linearity amplification requirement for non-constant envelope modulated signals in wireless communication systems, conventional linear amplifiers usually operate at a certain output power level (back off power level) that is different from a saturated power level. However, operating a linear amplifier at a back off power level has its own drawbacks. Indeed, the tradeoff of operating a linear amplifier at a back off power level is a low DC-to-RF efficiency on the amplifiers since peak DC-to-RF efficiency is usually achieved near a saturated output power level.
The prior art amplifier linearization techniques are widely used to improve the efficiency of non-linear amplifiers. However, conventional linearization techniques require the use of external circuitry to reduce distortion levels at the output of non-linear amplifiers.
The prior art common linearization techniques, such as feedforward, predistortion, and feedback techniques, have been disclosed in xe2x80x9cFeedfowardxe2x80x94An alternative approach to amplifier linearization,xe2x80x9d by T. J. Bennett et al., The Radio and Electronic Engineer, vol. 44, no. 5, pp. 257-262, May 1974; xe2x80x9cFeedforward linearization of 950 MHz amplifiers,xe2x80x9d by R. D. Stewart et al., IEEE Proceedings-H, vol. 135, no. 5, pp. 347-350, October 1988; xe2x80x9cAn automatically controlled predistorter for multilevel quadrature amplitude modulation, by J. Namiki, IEEE Trans. Commun., vol. COM-31, no. 5, pp. 707-712, May 1983; U.S. Pat. No. 4,465,980 by Huang et al.; U.S. Pat. No. 5,523,716 by Grebliunas et al.; U.S. Pat. No. 5,886,572 by Myers et al.; U.S. Pat. No. 5,821,814 by Katayama et al; U.S. Pat. No. 5,781,069 by Baskin. These techniques, however, usually involve very complex circuit configurations and require extensive alignment in production.
Recently, predistorters with simpler configuration have been disclosed in xe2x80x9cA normal amplitude and phase linearizing technique for microwave power amplifiers,xe2x80x9d M. Nakayama et al., 1995 IEER MTT-S Dig., pp. 1451-1454; xe2x80x9cA novel series diode linearizer for mobile radio power amplifiers,xe2x80x9d by K. Yamauchi et al., 1996 IEEE MTT-S Dig., pp. 831-834; xe2x80x9cPassive FETMMIC linearizers for C, X and Ku-band satellite applications,xe2x80x9d A. Katz et al., 1993 IEEE MTT-S Dig., pp. 353-356; U.S. Pat. No. 5,191,338 by Katz et al; U.S. Pat No. 6,396,327 by Lam; U.S. Pat. No. 6,307,436 by Hau; U.S. Pat. No. 6.346,853 by Kangaslahti et al.
As shown in FIG. 1A, the prior art recently developed circuitry 10 for linearized power amplifier (PA) 12 utilizes the conventional miniaturized predistorter design 24. Similarly, as shown in FIG. 1B, the recently developed prior art circuitry 30 for linearized power amplifier (PA) 32 utilizes the conventional miniaturized predistorter design 40. Though these recently developed prior art predistortion schemes achieve the circuitry size reduction over conventional size of circuitry design, they still require extra matching circuits, as shown in predistortion circuitry 24 of FIG. 1A, as well as shown in predistortion circuitry 40 of FIG. 1B.
In addition, these prior art predistortion schemes (10 of FIG. 1A and 30 of FIG. 1B) are difficult to use because they have poor isolation. Indeed, since conventional predistorters usually experience poor reverse isolation, power amplifiers incorporating the predistorters require additional isolators to improve circuit isolation to avoid interaction between the predistorters and amplifier stages which would degrade overall circuit performance.
The predistortion schemes (10 of FIG. 1A and 30 of FIG. 1B) also experience high loss. Indeed, predistorters 24 (of FIG. 1A) and 40 (of FIG. 1B) are all passive in nature with insertion loss level ranges from 4 dB to 20 dB depending on the design. Extra buffer amplifiers (14 of FIG. 1A; 34 of FIG. 1B) are usually added to compensate the high insertion loss. The use of buffer amplifiers is of particular concern as that would increase overall DC power consumption. Even though the overall efficiency of the linearized amplifier is improved, the increased DC power requirements increase the size and cost of the power supply or battery needed.
What is needed is to develop a novel linearized circuitry for a power amplifier that is free from the above-identified problems.
To address the shortcomings of the available art, the present invention provides novel linearized circuitry for a power amplifier that is free from the above-identified problems related to the prior art predistortion schemes (10 of FIG. 1A and 30 of FIG. 1B).
One aspect of the present invention is directed to an apparatus and method for improving linearity of an RF signal. In one embodiment, the apparatus of the present invention comprises: (a) a splitter; (b) an over-biased non-linear RF power amplifier; (c) an under-biased non-linear RF power amplifier; (d) a combiner; (e) a bias controller; and (f) a circulator.
In one embodiment of the present invention, the splitter is configured to receive an input RF signal, and configured to split the input RF signal into two RF signals comprising a first input RF signal, and a second input RF signal.
In one embodiment of the present invention, the over-biased non-linear RF power amplifier is configured to receive the first input RF signal and configured to generate an over-biased non-linear output signal having an over-biased non-linear distortion component. The over-biased non-linear RF power amplifier is configured to receive an over-biased DC signal being greater than an optimum bias DC voltage.
In one embodiment of the present invention, the under-biased non-linear RF power amplifier is configured to receive the second input RF signal and configured to generate an under-biased non-linear output signal having an under-biased non-linear distortion component. The under-biased non-linear RF power amplifier is configured to receive an under-biased DC signal being lower than the optimum bias DC voltage. In one embodiment of the present invention, the combiner is configured to combine the over-biased non-linear output signal and the under-biased non-linear output signal.
In one embodiment of the present invention, the bias controller is configured to keep the over-biased DC signal greater than the optimum bias DC voltage by an over_biased DC value. In one embodiment of the present invention, the bias controller is configured to keep the under-biased DC signal lower than the optimum bias DC voltage by an under_biased DC value.
In one embodiment of the present invention, the bias controller is configured to keep the over_biased DC value substantially equal to the under_biased DC value so that the over-biased non-linear distortion component and the under-biased non-linear distortion component are substantially cancelled. In this embodiment, the combiner outputs an RF signal having the substantially cancelled over-biased non-linear distortion component and having the substantially cancelled under-biased non-linear distortion component.
In one embodiment of the present invention, the bias controller further comprises an analog bias controller. In another embodiment of the present invention, the bias controller further comprises a digital bias controller.
In one embodiment of the present invention, the circulator is configured to pass without an additional loss the RF power signal having the substantially cancelled over-biased non-linear distortion component and having the substantially cancelled under-biased non-linear distortion component to an output of the apparatus. The circulator is also configured to substantially suppress an RF power signal reflected from the output of the apparatus and is configured to substantially prevent the reflected RF signal from entering the apparatus.
In one embodiment, the apparatus of the present invention for improving linearity of an RF signal further includes an over-biased DC circuit configured to generate the over-biased DC signal being greater than the optimum bias DC voltage. In one embodiment, the apparatus of the present invention for improving linearity of an RF signal further includes an under-biased DC circuit configured to generate the under-biased DC signal being lower than the optimum bias DC voltage.
In one embodiment of the present invention, the over-biased DC circuit further includes an over-biased temperature control circuit further including: (1) a temperature sensor circuit configured to measure temperature fluctuations; and (2) an over-biased temperature compensation circuit configured to compensate the over-biased DC circuit for the measured temperature fluctuations.
In one embodiment of the present invention, the under-biased DC circuit further includes an under-biasandd temperature control circuit further including: (1) a temperature sensor circuit configured to measure temperature fluctuations; and (2) an under-biased temperature compensation circuit configured to compensate the under-biased DC circuit for the measured temperature fluctuations.
In one embodiment of the present invention, the temperature sensor circuit further includes an active semiconductor device including a threshold voltage. The threshold voltage depends on the temperature fluctuations, and the active semiconductor device generates a DC voltage signal that depends on the threshold voltage. In one embodiment of the present invention, the active semiconductor device further includes at least one diode. In another embodiment of the present invention, the active semiconductor device further includes at least one transistor.
In one embodiment of the present invention, the temperature sensor circuit further includes at least one thermistor, wherein the thermistor changes its resistance depending on the temperature fluctuations.
In one embodiment of the present invention, the over-biased temperature compensation circuit further includes: (1) an analog (or digital) potentiometer configured to generate an analog (or digital) reference over-biased voltage signal, and (2) an operational amplifier configured to sum a difference between the analog (digital) reference over-biased voltage signal and a signal that depends on the temperature fluctuations. The operational amplifier is configured to generate a temperature-over-biased-control-voltage signal in order to keep the analog (digital) reference over-biased voltage signal substantially the same over a substantially broad temperature range.
In one embodiment of the present invention, the under-biased temperature compensation circuit further includes: (1) an analog (digital) potentiometer configured to generate an analog (digital) reference under-biased voltage signal, and (2) an operational amplifier configured to sum a difference between the analog (digital) reference under-biased voltage signal and a signal that depends on the temperature fluctuations. The operational amplifier is configured to generate a temperature-under-biased-control-voltage signal in order to keep the analog (digital) reference under-biased voltage signal substantially the same over a substantially broad temperature range.
In one embodiment, the apparatus of the present invention for improving linearity of an RF signal further comprises an adaptive loop configured to minimize the residual distortion component. In one embodiment of the present invention, the adaptive loop further comprises an analog feedback loop. In another embodiment of the present invention, the adaptive loop further comprises a digital feedback loop. In one more embodiment of the present invention, the adaptive loop further comprises a digital feedforward loop.
In one embodiment of the present invention, the adaptive bias feedback loop further includes: (1) a distortion sensor configured to measure the residual distortion signal, and configured to generate a distortion sensor signal proportional to the residual distortion signal, and (2) an adaptive bias controller configured under control of the distortion sensor signal to change the under-biased DC signal and configured to change the over-biased DC signal in order to minimize the residual distortion signal.
In one embodiment of the present invention, the adaptive bias controller further includes a programmable digital bias controller configured to pre-set a programmable minimum residual distortion level. In another embodiment of the present invention, the adaptive bias controller further includes a programmable digital bias controller programmed to minimize the programmable minimum residual distortion level to accommodate for a set of external parameters selected from the group consisting of: {an outside temperature level, an output power level, and a frequency range of the apparatus}.
Another aspect of the present invention is directed to a method for improving linearity of an RF signal. In one embodiment, the method comprises the following steps: (a) receiving an input RF signal and splitting the input RF signal into two RF signals by utilizing a splitter, the two RF signals comprising a first input RF signal, and a second input RF signal; (b) generating an over-biased non-linear output signal having an over-biased non-linear distortion component by using an over-biased non-linear RF power amplifier; (c) generating an under-biased non-linear output signal having an under-biased non-linear distortion component by using an under-biased non-linear RF power amplifier; (d) combining the over-biased non-linear output signal and the under-biased non-linear output signal by using a combiner; (e) outputting an RF signal having a residual distortion component; (f) substantially suppressing an RF power signal reflected from an output of the apparatus and substantially preventing the reflected RF signal from entering the apparatus by using a circulator; and (g) minimizing the residual distortion component by using an adaptive loop.